Saturday, October 2, 2010

What is metastable state ? How does it occur ?

5 comments:

  1. Whenever there are setup and hold time violations in any flip-flop, it enters a state where its output is unpredictable: this state is known as metastable state.whenever setup and hold violation time occurs, metastability occurs,When interfacing two domains operating at two different frequencies or at the same frequency but with different phase.

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  2. Metastability in electronics is usually seen as a problem. A changing circuit is supposed to "settle" into one of a small number of desired states, but if the circuit is vulnerable to metastability, it can get "stuck" in an undesirable state.

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  3. the flip-flop is a device that is susceptible to metastability. It has two well-defined stable states, traditionally designated 0 and 1, but under certain conditions it can hover between them for longer than a clock cycle. This condition is known as metastability. Such a metastable "state" is considered a failure mode of the logic design and timing philosophy or implementation.

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  4. Whenever there are setup and hold time violations in any flip-flop, it enters a state where its output is unpredictable: this state is known as metastable state (quasi stable state); at the end of metastable state, the flip-flop settles down to either '1' or '0'. This whole process is known as metastability.

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  5. meta stable state is a state Whenever there are setup and hold time violations inthe flip flop of any kind , it enters a state where its output can be unpredictable and also this state is known as metastable state.whenever setup and hold violation time occurs, metastability occurs,When interfacing two domains operating at two different frequencies or at the same frequency but with different phase.

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